GetCPUInfo method
Programmed by Héctor A. Medina
Prototype
GetCPUInfo Proto lpCPUInfo:DWord
Syntax
Invoke GetCPUInfo, lpCPUInfo
Function
Executes the CPUID instruction (not available in all processors) and returns information about the CPU.
Parameters
lpCPUInfo
Address of a CPUINFO structure (Easy Code defined).
Return value
Eax returns TRUE if sucessful, or FALSE if not.
If successful, the CPUINFO structure
will have been filled with various CPU information. This structure is defined as follows:
CPUINFO Struct
Description Byte 32 Dup(0) ; CPU description ('GenuineIntel', 'AuthenticAMD', etc.)
Stepping DWord 0 ; Stepping ID
Family DWord 0 ; Family (3 = 386, 4 = 486, 5 = Pentium, 6 = Pentium Pro)
Model DWord 0 ; Model
CPUType DWord 0 ; Reserved
ModelID DWord 0 ; See 'REMARKS'
FeaturesID DWord 0 ; See 'REMARKS'
CPUINFO EndS
REMARKS: The CPUID instruction
sets the Eax and Edx registers with
various information about the CPU. Although some of the information in the Eax
register is already detailed in the Stepping, Family, Model and CPUType members
of the structure, the whole value is also stored in the ModelID member. On the other hand, the
FeaturesID member stores the value set by CPUID in the Edx register. This value refers to compability flags and has the following
meaning:
| Bit 0 | FPU on Chip |
| Bit 1 | Virtual Mode Extention present |
| Bit 2 | Debbuging Extentions |
| Bit 3 | CPU support 4MB size pages |
| Bit 4 | TSC present (See RDTSC command) |
| Bit 5 | CPU have Pentium Compatible MSRs |
| Bit 6 | Physical Address Extension (Intel), Support PTE (Cyrix) |
| Bit 7 | Machine Check exception |
| Bit 8 | Support CMPXCHG8B instruction |
| Bit 9 | Local APIC on Chip (Intel), Page Global Extension (K5) |
| Bit 10 | Reserved |
| Bit 11 | Fast System Call feature (Pentium Pro) |
| Bit 12 | CPU support Memory Type Range Register (MTRR) |
| Bit 13 | Page Global Feature support |
| Bit 14 | Machine Check Architecture |
| Bit 15 | CPU support CMOV instruction |
| Bit 16 | Page Attribute Table |
| Bit 17 | CPU support 4MB Pages for access memory higher that 2GB |
| Bit 18 | CPU Support Processor Serial Number |
| Bit 19-22 | Reserved |
| Bit 23 | CPU support IA MMX |
| Bit 24 | CPU Support Fast Save/Restore (IA MMX-2) |
| Bit 25 | Streaming SIMD Extension (IA MMX-2) |
| Bit 26-31 | Reserved and set to 0s now |